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Application-specific signatures for transactional memory in soft processors
Martin Labrecque, Mark C. Jeffrey, J. Gregory Steffan
Article No.: 21
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchronization in a way that is scalable and easy to program becomes a...
Optimizing memory bandwidth use and performance for matrix-vector multiplication in iterative methods
David Boland, George A. Constantinides
Article No.: 22
Computing the solution to a system of linear equations is a fundamental problem in scientific computing, and its acceleration has drawn wide interest in the FPGA community [Morris et al. 2006; Zhang et al. 2008; Zhuo and Prasanna 2006]. One class...
TR-FSM: Transition-Based reconfigurable finite state machine
Johann Glaser, Markus Damm, Jan Haase, Christoph Grimm
Article No.: 23
Finite State Machines (FSMs) are a key element of integrated circuits. Hard-coded FSMs do not allow changes after the ASIC production. While an embedded FPGA IP core provides flexibility, it is a complex circuit, requires difficult synthesis...
Application-Specific FPGA using heterogeneous logic blocks
Husain Parvez, Zied Marrakchi, Alp Kilic, Habib Mehrez
Article No.: 24
This work presents a new automatic mechanism to explore the solution space between Field Programmable Gate Arrays (FPGAs) and Application-Specific Integrated Circuits (ASICs). This new solution is termed as an Application-Specific Inflexible FPGA...
In modern Web search engines, Neural Network (NN)-based learning to rank algorithms is intensively used to increase the quality of search results. LambdaRank is one such algorithm. However, it is hard to be efficiently accelerated by computer...
SHMEM+: A multilevel-PGAS programming model for reconfigurable supercomputing
Vikas Aggarwal, Alan D. George, Changil Yoon, Kishore Yalamanchili, Herman Lam
Article No.: 26
Reconfigurable Computing (RC) systems based on FPGAs are becoming an increasingly attractive solution to building parallel systems of the future. Applications targeting such systems have demonstrated superior performance and reduced energy...
An analytical model for multilevel performance prediction of Multi-FPGA systems
Brian Holland, Alan D. George, Herman Lam, Melissa C. Smith
Article No.: 27
Power limitations in semiconductors have made explicitly parallel device architectures such as Field-Programmable Gate Arrays (FPGAs) increasingly attractive for use in scalable systems. However, mitigating the significant cost of FPGA development...
Leveraging reconfigurability in the hardware/software codesign process
Lesley Shannon, Paul Chow
Article No.: 28
Current technology allows designers to implement complete embedded computing systems on a single FPGA. Using an FPGA as the implementation platform introduces greater flexibility into the design process and allows a new approach to embedded system...
Applying dynamic reconfiguration in the mobile robotics domain: A case study on computer vision algorithms
Federico Nava, Donatella Sciuto, Marco Domenico Santambrogio, Stefan Herbrechtsmeier, Mario Porrmann, Ulf Witkowski, Ulrich Rueckert
Article No.: 29
Mobile robots are widely used in industrial environments and are expected to be widely available in human environments in the near future, for example, in the area of care and service robots. This article proposes an implementation for a highly...
Platform-aware bottleneck detection for reconfigurable computing applications
Seth Koehler, Greg Stitt, Alan D. George
Article No.: 30
Reconfigurable Computing (RC) has the potential to provide substantial performance benefits and yet simultaneously consume less power than traditional microprocessors or GPUs. While experimental performance analysis of RC applications has...