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Self-Alignment Schemes for the Implementation of Addition-Related Floating-Point Operators
Tarek Ould-Bachir, Jean Pierre David
Article No.: 1
Advances in semiconductor technology brings to the market incredibly dense devices, capable of handling tens to hundreds floating-point operators on a single chip; so do the latest field programmable gate arrays (FPGAs). In order to alleviate the...
An FPGA-Based Accelerator for Frequent Itemset Mining
Yan Zhang, Fan Zhang, Zheming Jin, Jason D. Bakos
Article No.: 2
In this article we describe a Field Programmable Gate Array (FPGA)-based coprocessor architecture for Frequent Itemset Mining (FIM). FIM is a common data mining task used to find frequently occurring subsets amongst a database of sets. FIM is a...
There has been a steady increase in the utilization of heterogeneous architectures to tackle the growing need for computing performance and low-power systems. The execution of computation-intensive functions on specialized hardware enables to...
Floating-Point Exponentiation Units for Reconfigurable Computing
Florent de Dinechin, Pedro Echeverría, Marisa López-Vallejo, Bogdan Pasca
Article No.: 4
The high performance and capacity of current FPGAs makes them suitable as acceleration co-processors. This article studies the implementation, for such accelerators, of the floating-point power function xy as defined by the C99...
ReShape: Towards a High-Level Approach to Design and Operation of Modular Reconfigurable Systems
Christopher E. Neely, Gordon Brebner, Weijia Shang
Article No.: 5
The latest FPGA devices provide the headroom to implement large-scale and complex systems. A key requirement is the integration of modules from diverse sources to promote modular design and reuse. A contrary factor is that using dynamic partial...