Reconfigurable Technology and Systems (TRETS)


Search Issue
enter search term and/or author name


ACM Transactions on Reconfigurable Technology and Systems (TRETS) - Special Section on 19th Reconfigurable Architectures Workshop (RAW 2012), Volume 6 Issue 2, July 2013

Section: 1 - Special Section on 19th Reconfigurable Architectures Workshop (RAW 2012)

Introduction to the special section on 19th reconfigurable architectures workshop (RAW 2012)
Diana Goehringer, René Cumplido
Article No.: 6
DOI: 10.1145/2499625.2499626

JITPR: A framework for supporting fast application's implementation onto FPGAs
Harry Sidiropoulos, Kostas Siozios, Peter Figuli, Dimitrios Soudris, Michael Hübner, Jürgen Becker
Article No.: 7
DOI: 10.1145/2492185

The execution runtime usually is a headache for designers performing application mapping onto reconfigurable architectures. In this article we propose a methodology, as well as the supporting toolset, targeting to provide fast application...

Virtual networks -- distributed communication resource management
Jan Heisswolf, Aurang Zaib, Andreas Weichslgartner, Ralf König, Thomas Wild, Jürgen Teich, Andreas Herkersdorf, Jürgen Becker
Article No.: 8
DOI: 10.1145/2492186

Networks-on-Chip (NoC) enable scalability for future manycore architectures, facilitating parallel communication between multiple cores. Applications running in parallel on a NoC-based architecture can affect each other due to overlapping...

A comprehensive performance analysis of virtual routers on FPGA
Thilan Ganegedara, Viktor Prasanna
Article No.: 9
DOI: 10.1145/2492187

Network virtualization has gained much popularity with the advent of datacenter networking. The hardware aspect of network virtualization, router virtualization, allows network service providers to consolidate network hardware, reducing...

Towards development of an analytical model relating FPGA architecture parameters to routability
Joydip Das, Steven J. E. Wilton
Article No.: 10
DOI: 10.1145/2499625.2499627

We present an analytical model relating FPGA architectural parameters to the routability of the FPGA. The inputs to the model include the channel width and the connection and the switch block flexibilities. The output is an estimate of the...

Virtualizable hardware/software design infrastructure for dynamically partially reconfigurable systems
Chun-Hsian Huang, Pao-Ann Hsiung
Article No.: 11
DOI: 10.1145/2499625.2499628

In most existing works, reconfigurable hardware modules are still managed as conventional hardware devices. Further, the software reconfiguration overhead incurred by loading corresponding device drivers into the kernel of an operating system has...