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Imprecise Datapath Design: An Overclocking Approach
Kan Shi, David Boland, George A. Constantinides
Article No.: 6
In this article, we describe an alternative circuit design methodology when considering trade-offs between accuracy, performance, and silicon area. We compare two different approaches that could trade accuracy for performance. One is the...
Parallelizing Data Processing on FPGAs with Shifter Lists
Louis Woods, Gustavo Alonso, Jens Teubner
Article No.: 7
Parallelism is currently seen as a mechanism to minimize the impact of the power and heat dissipation problems encountered in modern hardware. Data parallelism—based on partitioning the data—and pipeline parallelism—based on...
Section: Imprecise Datapath Design
A Runtime FPGA Placement and Routing Using Low-Complexity Graph Traversal
Ricardo Ferreira, Luciana Rocha, André G. Santos, José A. M. Nacif, Stephan Wong, Luigi Carro
Article No.: 9
Dynamic Partial Reconfiguration (DPaR) enables efficient allocation of logic resources by adding new functionalities or by sharing and/or multiplexing resources over time. Placement and routing (P&R) is one of the most time-consuming steps in the...
Timing-Driven Titan: Enabling Large Benchmarks and Exploring the Gap between Academic and Commercial CAD
Kevin E. Murray, Scott Whitty, Suya Liu, Jason Luu, Vaughn Betz
Article No.: 10
Benchmarks play a key role in Field-Programmable Gate Array (FPGA) architecture and CAD research, enabling the quantitative comparison of tools and architectures. It is important that these benchmarks reflect modern large-scale systems that make...
Solving the Global Atmospheric Equations through Heterogeneous Reconfigurable Platforms
Lin Gan, Haohuan Fu, Wayne Luk, Chao Yang, Wei Xue, Xiaomeng Huang, Youhui Zhang, Guangwen Yang
Article No.: 11
One of the most essential and challenging components in climate modeling is the atmospheric model. To solve multiphysical atmospheric equations, developers have to face extremely complex stencil kernels that are costly in terms of both computing...
Autonomous Soft-Error Tolerance of FPGA Configuration Bits
Anup Das, Shyamsundar Venkataraman, Akash Kumar
Article No.: 12
Field-programmable gate arrays (FPGAs) are increasingly susceptible to radiation-induced single event upsets (SEUs). These upsets are predominant in a space environment; however, with increasing use of static RAM (SRAM) in modern FPGAs, these SEUs...
FPGA-based data processing is becoming increasingly relevant in data centers, as the transformation of existing applications into dataflow architectures can bring significant throughput and power benefits. Furthermore, a tighter integration of...