Reconfigurable Technology and Systems (TRETS)


Search Issue
enter search term and/or author name


ACM Transactions on Reconfigurable Technology and Systems (TRETS) - Special Section on Field Programmable Logic and Applications 2015 and Regular Papers, Volume 10 Issue 2, April 2017

Section: Special Section on Field Programmable Logic and Applications 2016

Introduction to the Special Section on FPL 2015
João M. P. Cardoso, Cristina Silvano
Article No.: 10
DOI: 10.1145/3041224

Synthesizable Standard Cell FPGA Fabrics Targetable by the Verilog-to-Routing CAD Flow
Jin Hee Kim, Jason H. Anderson
Article No.: 11
DOI: 10.1145/3024063

In this article, we consider implementing field-programmable gate arrays (FPGAs) using a standard cell design methodology and present a framework for the automated generation of synthesizable FPGA fabrics. The open-source Verilog-to-Routing (VTR)...

Efficient Assembly for High-Order Unstructured FEM Meshes (FPL 2015)
Pavel Burovskiy, Paul Grigoras, Spencer Sherwin, Wayne Luk
Article No.: 12
DOI: 10.1145/3024064

The Finite Element Method (FEM) is a common numerical technique used for solving Partial Differential Equations on large and unstructured domain geometries. Numerical methods for FEM typically use algorithms and data structures which exhibit an...

(FPL 2015) Scavenger: Automating the Construction of Application-Optimized Memory Hierarchies
Hsin-Jung Yang, Kermin Fleming, Felix Winterstein, Michael Adler, Joel Emer
Article No.: 13
DOI: 10.1145/3009971

High-level abstractions separate algorithm design from platform implementation, allowing programmers to focus on algorithms while building complex systems. This separation also provides system programmers and compilers an opportunity to optimize...

Hoplite: A Deflection-Routed Directional Torus NoC for FPGAs
Nachiket Kapre, Jan Gray
Article No.: 14
DOI: 10.1145/3027486

We can design an FPGA-optimized lightweight network-on-chip (NoC) router for flit-oriented packet-switched communication that is an order of magnitude smaller (in terms of LUTs and FFs) than state-of-the-art FPGA overlay routers available today....

Section: Special Section on Field Programmable Logic and Applications 2016

The First 25 Years of the FPL Conference: Significant Papers
Philip H. W. Leong, Hideharu Amano, Jason Anderson, Koen Bertels, João M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, Junkyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang
Article No.: 15
DOI: 10.1145/2996468

A summary of contributions made by significant papers from the first 25 years of the Field-Programmable Logic and Applications conference (FPL) is presented. The 27 papers chosen represent those which have most strongly influenced theory and...

Performance Scalability of Adaptive Processor Architecture
Shigeyuki Takano
Article No.: 16
DOI: 10.1145/3007902

In this article, we evaluate the performance scalability of architectures called adaptive processors, which dynamically configure an application-specific pipelined datapath and perform a data-flow streaming execution. Previous works have examined...