Reconfigurable Technology and Systems (TRETS)


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ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 2 Issue 4, September 2009

Introduction to the Special Issue ARC’08
Katherine Compton, Roger Woods, Christos Bouganis, Pedro Diniz
Article No.: 20
DOI: 10.1145/1575779.1575780

Exploring Reconfigurable Architectures for Tree-Based Option Pricing Models
Qiwei Jin, David B. Thomas, Wayne Luk, Benjamin Cope
Article No.: 21
DOI: 10.1145/1575779.1575781

This article explores the application of reconfigurable hardware to the acceleration of financial computation using tree-based pricing models. Two parallel pipelined architectures have been developed for option valuation using binomial trees and...

Robust Real-Time Super-Resolution on FPGA and an Application to Video Enhancement
Maria E. Angelopoulou, Christos-Savvas Bouganis, Peter Y. K. Cheung, George A. Constantinides
Article No.: 22
DOI: 10.1145/1575779.1575782

The high density image sensors of state-of-the-art imaging systems provide outputs with high spatial resolution, but require long exposure times. This limits their applicability, due to the motion blur effect. Recent technological advances have...

Space Optimization on Counters for FPGA-Based Perl Compatible Regular Expressions
Chia-Tien Dan Lo, Yi-Gang Tai
Article No.: 23
DOI: 10.1145/1575779.1575783

With their expressiveness and simplicity, Perl compatible regular expressions (PCREs) have been adopted in mainstream signature based network intrusion detection systems (NIDSs) to describe known attack signatures, especially for polymorphic...

An Application Development Framework for ARISE Reconfigurable Processors
Nikolaos Vassiliadis, George Theodoridis, Spiridon Nikolaidis
Article No.: 24
DOI: 10.1145/1575779.1575784

Coupling reconfigurable hardware accelerators with processors is an effective way to meet the performance and flexibility required to cope with modern embedded applications. The ARISE framework provides a systematic approach to extend a processor...

Optimal Loop Unrolling and Shifting for Reconfigurable Architectures
Ozana Silvia Dragomir, Todor Stefanov, Koen Bertels
Article No.: 25
DOI: 10.1145/1575779.1575785

In this article, we present a new technique for optimizing loops that contain kernels mapped on a reconfigurable fabric. We assume the Molen machine organization as our framework. We propose combining loop unrolling with loop shifting, which is...

From Silicon to Science: The Long Road to Production Reconfigurable Supercomputing
Keith D. Underwood, K. Scott Hemmert, Craig D. Ulmer
Article No.: 26
DOI: 10.1145/1575779.1575786

The field of high performance computing (HPC) currently abounds with excitement about the potential of a broad class of things called accelerators. And, yet, few accelerator based systems are being deployed in general purpose HPC...